What is PLL? What is the function of PLL?

PLL is the abbreviation of phase locked loop, which is translated into phase locked loop in Chinese. According to the architecture, it can be divided into analog, digital and digital-analog mixed phase-locked loop. According to the loop transfer function, it can be divided into first-order, second-order, third-order and high-order phase-locked loops. According to other classification methods, it can be divided into integer PLL and decimal PLL, charge pump PLL and non-charge pump PLL, LC VCO (voltage controlled oscillator) and ring VCO PLL and so on. The main functions of PLL are frequency synthesis and CDR (clock data recovery).

Frequency synthesis refers to the locking of PLL feedback clock and input reference clock. Because the frequency divider circuit is added in the feedback, VCO can generate a clock several times the input reference clock. If the frequency divider is an integer frequency divider, the output clock of VCO is an integer multiple of the reference clock; If it is a fractional frequency divider, theoretically, the output clock can be any frequency clock.

There are two ways to realize CDR using PLL. One is to use data as the input signal of PLL, and the loop is locked at the edge of the input signal to recover the clock of data resampling. Secondly, PLL generates multiphase clock, oversamples the input data, judges the data edge through digital circuit, and finally generates clock to resample the data.

Provide classic reference books on PLL: analog CMOS integrated circuit design of RAZAVI; Best PLL, Gardner PLL.