Schematic diagram of ram

Many of our Chips have ram as a memory, a memory is a device that can store data and read it when given an address code. Depending on the method of storage, memory can be categorized into two main types: random memory (ram) and read-only memory (rom).

The original meaning of ram is that the data can be accessed in any order and in the same amount of time, regardless of the memory cell. Even if it is not possible to access in an arbitrary order, all semiconductor memories that can be deposited and read out in the same order and with the same action time are included in ram.

According to the different principles of storing information, randomized memory can be divided into two kinds of static and dynamic. Static ram is a bistable element as the basic storage unit to save information, therefore, its saved information in the case of constant power, is not destroyed; and dynamic ram is relying on the principle of capacitance charging and discharging to store the information, due to save the charge on the capacitor, will leak over time, thus making the device stored in the information is lost, it must be refreshed at regular intervals.

Generally a memory system consists of the following parts.

1. Basic storage unit

A basic storage unit can store one bit of binary information, which has two stable and opposing states, and can recognize and change its state externally. Different types of basic memory cells determine different types of memory devices composed of them. The basic storage unit of static ram is a flip-flop made of two enhanced nm0s inverters cross-coupled, and each basic storage unit consists of six mos tubes, so the static storage circuit is also known as the six-tube static storage circuit.

The figure shows the schematic diagram of the six-tube static storage unit. Where t1 and t2 are control tubes and t3 and t4 are load tubes. This circuit has two relative steady state states, if the tl tube is cut off then a = "l" (high level), which turns the t2 tube on, so b = "0" (low level), and b = "0 " further ensures the cutoff of tube t1. So, this state is stable and unchanged in the absence of external triggering. Similarly, the state in which the t1 tube conducts, i.e., a = "0" (low level), and the t2 tube cuts off, i.e., b = "1" (high level), is also stable. Therefore, the two relatively stable states of this circuit can be used to represent logic "1" and logic "0" respectively.

When the flip-flop is used as a storage circuit, it should be able to receive external trigger control signals to read out or change the state of the storage unit, which formed the following right figure shows the basic six-tube storage circuit. Which t5, t6 for the gate control tube.

(a) six-tube static storage unit principle schematic diagram (b) six-tube basic storage circuit

Figure Six-tube static storage unit (we often see there is the t3 & t1 gate connected together, t2 & t4 gate connected together)

When the x-decoder output line is a high level, the t5, t6 tubes are on, and the a, b terminals are connected to the bit line respectively.

When the x decode output line is high, t5 and t6 tubes conduct, and the a and b terminals are connected to the bit lines d0 and respectively; if the corresponding y decode output is also high, t7 and t8 tubes (which are common to all rows and do not belong to a memory cell) also conduct, and d0 and (which are the internal bit lines of the memory cell) are connected to the i/o and lines of the input/output circuits.

Write operation: write signals from the i/o line and line input, such as to write "1", the i/o line is a high level and the line is a low level, they are connected to the a terminal and b terminal through the t7, t8 tubes and t5, t6 tubes, respectively, to make a = "1", b = "1", and b = "1". ", b = "0", i.e., forcing the t2 tube to conduct and the tl tube to cut off, equivalent to the input charge stored in the gate level of the tl and t2 tubes. When the input signal and the address selection signal disappear, t5, t6, t7 and t8 are cutoff. As the memory unit has a power supply and load tube, can be constantly to the gate charge, relying on the two inverters cross control, as long as the power does not fall, you can keep the written information "1", without regeneration (refresh). If you want to write "0", the line is low and the i/o line is high, so that the tl tube conducts, t 2 tube cutoff that a = "0", b = "1".

Reading operation: as long as a unit is selected, the corresponding t5, t6, t7, t8 are on, a point and b point through t5, t6 tube and d0 and respectively, d0 and further through t7, t8 tube and i/o and line through, that is, the state of the unit is transmitted to the i/o and line.

This shows that the readout process of this storage circuit is non-destructive, i.e., the state of the original storage circuit remains unchanged after the information is read out.